DeepSeek and Huawei Open-Source Ascend AI Programming Tools to Challenge NVIDIA CUDA Dominance
DeepSeek and Huawei release an open-source software suite for Ascend AI chips, featuring TileLang, DeepGEMM, and DeepEP libraries to simplify AI kernel development outside CUDA.
On October 1, 2026, artificial intelligence research lab DeepSeek and Huawei Technologies announced a major open-source software collaboration, releasing a comprehensive suite of programming tools, kernel libraries, and compiler runtimes engineered specifically for Huawei Ascend AI accelerators. Headlined by native Ascend support for TileLang, DeepGEMM matrix engines, and DeepEP expert parallelism communication, the initiative aims to dismantle NVIDIA proprietary CUDA software moat by enabling developers to build, optimize, and deploy frontier foundation models on non-NVIDIA silicon with high developer ergonomics.
TileLang, DeepGEMM, and DeepEP: Bridging the Software Moat
Historically, alternative AI accelerator architectures have struggled against NVIDIA not because of raw silicon specifications, but due to CUDA vast ecosystem of pre-optimized libraries. DeepSeek collaboration tackles this bottleneck directly by open-sourcing production-grade kernel infrastructure. The release introduces an Ascend-native port of TileLang, a domain-specific programming language that abstracts complex memory hierarchies into intuitive tile-based abstractions. Developers can compose high-performance custom attention mechanisms and fused activation kernels in Python-like syntax that compiles down directly to DaVinci NPU instructions, achieving throughput parity with hand-tuned assembly.
Open-Source Suite & Architecture Highlights
- TileLang for Ascend: High-level kernel programming language providing automated memory scheduling and instruction generation for Ascend NPUs.
- DeepGEMM-Ascend Library: Highly optimized General Matrix Multiply (GEMM) runtime accelerating dense and sparse matrix computations.
- DeepEP Communication Fabric: Low-latency expert parallelism library engineered to eliminate inter-accelerator communication bottlenecks in Mixture-of-Experts (MoE) models.
- 128-Processor Supernode Support: Native primitives scaling coherently across unified supernodes linking 128 Ascend 950 processors.
- Open-Source Permissive Licensing: Published publicly on GitHub to encourage global developer contribution and cross-framework adoption.
128-Chip Supernodes and the Push for Hardware-Agnostic AI
Beyond individual operator efficiency, the release integrates cluster-level scaling optimizations co-designed for Huawei next-generation hardware. The software incorporates communication primitives tuned for a 128-chip Ascend 950 supernode configuration, optimizing all-to-all data exchanges across optical UnifiedBus interconnects. By demonstrating that frontier reasoning models like DeepSeek-V3 can be trained and served efficiently on non-CUDA architectures, the project establishes a viable blueprint for global AI labs seeking semiconductor supply chain diversification.
Platform Profile Sheet
| Feature | Details |
|---|---|
| Announcement Date | October 1, 2026 |
| Collaborating Organizations | DeepSeek & Huawei Technologies |
| Core Software Suite | TileLang, DeepGEMM-Ascend, DeepEP-Ascend |
| Hardware Target | Huawei Ascend 910/950 NPU Ecosystem |
| License | Open-Source (Permissive Public Repository) |
| Primary Goal | Eliminating CUDA Dependency & Lowering Kernel Writing Friction |
| Primary Sources | Tom's Hardware / The Next Web / TechNode Global |
| Scalability Target | Unified Supernodes Linking 128 Ascend 950 Processors |